Anritsu publish 116-Gbit/s PAM4 Error Detector FEC Analysis Function
January18, 2021– Anritsu Corporation (President Hirokazu Hamada)has published details on the MP1900A web site about its new FEC Analysis function of the 116-Gbit/s PAM4 Error Detector (ED)MU196040B option for the Signal Quality Analyzer-R MP1900A series.
The MP1900A series is a high-quality bit error rate tester (BERT) for evaluating next-generation 400 and 800GbE*1 high-speed devices and transceivers. The newly announced FEC Analysis function is the first time for a BERT to support real-time measurement of Forward Error Correction (FEC) Symbol Errors*2; in addition to conventional bit error measurement, it also supports jitter tolerance*3 measurements for assessing error correction capability using FEC as required by transmissions using high-speed PAM4*4 signals. Sales of this new MU196040B option start in March 2021.
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Background
Data centers supporting next-generation, high-speed, large-capacity 5G mobile communications are progressing with introduction of equipment meeting the 400GbE communications standard, while also starting investigation of 800GbE and 1.6 TbE standards to facilitate even faster speeds.
The PAM4 transmission method used by 400GbE expresses digital data using four voltage levels per unit time to transmit twice as much data compared to the earlier conventional NRZ*5 method. However, due to the narrower differences between the four voltage levels, the greater susceptibility to noise and transmission path losses makes error-free transmission more difficult than using the conventional NRZ method. As a result, error correction using FEC is applied to assure transmission quality. Consequently, evaluation of devices and transceivers supporting PAM4 not only requires jitter tolerance and sensitivity evaluations based on conventional biterror and error-free measurements, but also requires measurement of error correction capability using FEC.
Product Outline
To meet the above-described need, Anritsu has added this new FEC Analysis function for detecting FEC Symbol Errors based on the 400GbE FEC standard to its PAM4 ED with world-beating input-sensitivity performance. Using this new function, changes in bit errors and FEC Symbol Errors with changes in input amplitude and jitter conditions can be monitored in real-time to quickly and reproducibly evaluate when Symbol Error counts exceed the correction ability of FEC. Moreover, since this new FEC Analysis function is compatible with conventional jitter tolerance automatic measurement software, one-button jitter tolerance measurement is supported based on whether or not error correction using FEC is possible.
The Signal Quality Analyzer-R MP1900A series is the market-leading BERT for testing various high-speed interfaces, including 400GbE and future 800GbE, etc. Adding the high-sensitivity PAM4 ED MU196040B with expanded FEC Analysis functions supporting reliable bit error and FEC Symbol Error measurements will help cut development times for high-speed devices and transceivers.
[About MP1900A PAM4 BERT Solution]
https://www.anritsu.com/en-IN/test-measurement/solutions/hs-pam4-ber/index
Target Markets and Applications
- Target Markets: 400GbE/800GbEcommunications equipment and device makers
- Applications:400GbE/800GbE communications equipment and device bit error rate evaluation